J5C2: Difference between revisions
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== Hardware == | == Hardware == | ||
<ref name="xenonschematics">XENON_FABK Schematics, <i>Microsoft</i>, 24 August 2005</ref> | J5C2 is a 6-pin debug header that is used to provide a Serial Programmable Interface (SPI) for the GPU EEPROM U4C1.<ref name="xenonschematics">XENON_FABK Schematics, <i>Microsoft</i>, 24 August 2005</ref> | ||
== Pinout == | == Pinout == | ||
Revision as of 13:39, 12 March 2019
J5C2
J5C2
| Type | Beta/Retail |
|---|---|
| Purpose | GPU SPI EEPROM Header |
| Rarity | Common |
History
Hardware
J5C2 is a 6-pin debug header that is used to provide a Serial Programmable Interface (SPI) for the GPU EEPROM U4C1.[1]
Pinout
| Pin | Name | Direction |
|---|---|---|
| 1 | GPU_SPI_CLK_R | IN |
| 2 | GPU_SPI_SI | IN |
| 3 | GPU_SPI_SO_R | IN |
| 4 | GPU_SPI_WP_N | IN |
| 5 | GPU_SPI_CS_N_R | IN |
| 6 | GND | GND |
References
Gallery
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